Top 350+ Solved Digital Logic Circuits (DLC) MCQ Questions Answer
Q. What is the first state of FSM?
a. wait loop state
b. initial state
c. output state
d. activate pulse state
Q. In mealy type FSM, the path is labelled by which of the following?
a. inputs
b. outputs
c. both inputs and outputs
d. current state
Q. The process statement used in combinational circuits is called process.
a. combinational
b. clocked
c. unclocked
d. sequential
Q. Why we need to include all the input signals in the sensitivity list of the process?
a. to monitor the output continuously
b. to monitor the input continuously
c. to make the circuit synthesizable by eda tools
d. no special purpose
Q. Shift registers comprise of which flip-flops?
a. d flip-flops
b. sr flip-flops
c. jk flip-flops
d. t flip-flops
Q. In serial input serial output register, the data of is accessed by the circuit.
a. last flip-flop
b. first flip-flop
c. all flip-flops
d. no flip-flop
Q. In PIPO shift register, parallel data can be taken out by
a. using the q output of the first flip-flop
b. using the q output of the last flip-flop
c. using the q output of the second flip-flop
d. using the q output of each flip-flop
Q. Four bits shift register enables shift control signal in how many clock pulses?
a. two clock pulses
b. three clock pulses
c. four clock pulses
d. five clock pulses
Q. Time taken by the shift register to transfer the content is called
a. clock duration
b. bit duration
c. word duration
d. duration
Q. Transfer of one bit of information at a time is called
a. rotating
b. serial transfer
c. parallel transfer
d. shifting
Q. Which of the following is true about packages?
a. package is collection of libraries
b. library is collection of packages
c. package is collection of entities
d. entity is collection of packages
Q. Any item declared in a package declaration section are visible to
a. every design unit
b. package body only
c. library containing that package
d. design unit that use the package