Top 350+ Solved Digital Logic Circuits (DLC) MCQ Questions Answer

a. f’

b. f

c. ff

d. ff’

a. 1 input line

b. 2 input lines

c. 3 input lines

d. 4 input lines

a. logical network

b. system network

c. circuit network

d. gate network

a. p-channel enhancement type mosfet

b. n-channel enhancement type mosfet

c. p-channel depletion type mosfet

d. n-channel depletion type mosfet

a. wen tsing chow

b. dov frohman

c. luis o brian

d. j p longwell

a. chip selection and address location

b. read and write control

c. controlling refresh circuits

d. memory mapping

a. a 0 is stored by connecting the gate of a mos cell to the address line

b. a 0 is stored in a bipolar cell by shorting the base connection to the address line

c. a 1 is stored by connecting the gate of a mos cell to the address line

d. a 1 is stored in a bipolar cell by opening the base connection to the address line

a. allows data errors to be pinpointed to a specific memory location

b. provides a means for locating and correcting data errors in specific memory locations

c. indicates if the data in more than one memory location is incorrect

d. simply indicates that the contents of the rom are incorrect

a. 0

b. 1

c. both 0 and 1

d. alternate 0s and 1s

a. reprogrammed

b. restarted

c. charged

d. power off

a. its access speed is too slow

b. its matrix size is too big

c. it is volatile

d. high power consumption

a. tms 2513

b. tms 2515

c. tms 2516

d. tms 2518

a. 1024

b. 512

c. 2516

d. 256

a. power is on

b. power is off

c. system is down

d. all of the mentioned

a. able to read and write only 0s

b. faulty

c. probably good

d. able to read and write only 1s