Top 350+ Solved Digital Electronics and Logic Design MCQ Questions Answer

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Q. A positive edge-triggered flip-flop changes its state when                             

a. low-to-high transition of clock

b. high-to-low transition of clock

c. enable input (en) is set

d. preset input (pre) isset

  • a. low-to-high transition of clock

Q. Flip flops are also called                        

a. bi-stable dualvibrators

b. bi-stable transformer

c. bi-stable multivibrator s

d. bi-stable singlevibra tors

  • c. bi-stable multivibrator s

Q. Q2 :=Q1 OR X OR Q3The above ABEL expression will be

a. q2:= q1 $ x $ q3

b. q2:= q1 # x# q3

c. q2:= q1 & x& q3

d. q2:= q1 ! x ! q3

  • b. q2:= q1 # x# q3

Q. Above is the circuit diagram of              

a. asynchronous up-counter

b. asynchronou s down- counter

c. synchronous up-counter

d. synchrono us down- counter

  • a. asynchronous up-counter

Q. The high density FLASH memory cell is implemented using                          

a. 1 floating-gate mos transistor

b. 2 floating- gate mos transistors

c. 4 floating- gate mos transistors

d. 6 floating- gate mos transistors

  • a. 1 floating-gate mos transistor

Q. A multiplexer with a register circuit converts         

a. serial data to parallel

b. parallel data to serial

c. serial data to serial

d. parallel data to parallel

  • b. parallel data to serial

Q. In outputs depend only on the combination of current state and inputs

a. mealy machine

b. moore machine

c. state reduction table

d. state assignmen t table

  • a. mealy machine

Q. The input overrides the input

a. asynchronous, synchronous

b. synchronous,asynchronou s

c. preset input (pre), clear input (clr)

d. clear input (clr),preset input (pre)

  • a. asynchronous, synchronous

Q. If S=1 and R=1, then Q(t+1) = for negative edge triggered flip- flop

a. 0

b. 1

c. invalid

d. input is invalid

  • c. invalid

Q. The sequence of states that are implemented by a n-bit Johnson counter is

a. n+2

b. 2n

c. 2 raise to power n

d. n raise to power 2

  • b. 2n

Q. The alternate solution for a multiplexer and a register circuit is

a. parallel in / serial out shift register

b. serial in / parallel out shift register

c. parallel in / parallel out shift register

d. serial in / serial out shift register

  • a. parallel in / serial out shift register

Q. THE GLITCHES DUE TO RACE CONDITION CAN BE AVOIDED BY USING A

a. gated flip- flops

b. pulse triggered flip-flops

c. positive- edge triggered flip-flops

d. negative-edge triggere d flip- flops

  • d. negative-edge triggere d flip- flops
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