Top 350+ Solved Computer Architecture MCQ Questions Answer
Q. What is the full form of ANSI?
a. american national standards institute
b. architectural national standards institute
c. asian national standards institute
d. none of the mentioned
Q. SCSI stands for
a. signal computer system interface
b. small computer system interface
c. small coding system interface
d. signal coding system interface
Q. ISO stands for
a. international standards organisation
b. international software organisation
c. industrial standards organisation
d. industrial software organisation
Q. The system developed by IBM with ISA architecture is
a. sparc
b. sun-sparc
c. pc-at
d. none of the mentioned
Q. IDE stands for
a. integrated device electronics
b. international device encoding
c. industrial decoder electronics
d. international decoder encoder
Q. The circuit enables the generation of the ASCII code when the key is pressed.
a. generator
b. debouncing
c. encoder
d. logger
Q. To overcome multiple signals being generated upon a single press of the button, we make use of
a. generator circuit
b. debouncing circuit
c. multiplexer
d. xor circuit
Q. The best mode of connection between devices which need to send or receive large amounts of data over a short distance is
a. bus
b. serial port
c. parallel port
d. isochronous port
Q. The output of the encoder circuit is/are
a. ascii code
b. ascii code and the valid signal
c. encoded signal
d. none of the mentioned
Q. The disadvantage of using a parallel mode of communication is
a. it is costly
b. leads to erroneous data transfer
c. security of data
d. all of the mentioned
Q. In a 32 bit processor, the A0 bit of the address line is connected to of the parallel port interface.
a. valid bit
b. idle bit
c. interrupt enable bit
d. status or data register
Q. The Status flag circuit is implemented using
a. rs flip flop
b. d flip flop
c. jk flip flop
d. xor circuit
Q. In the output interface of the parallel port, along with the valid signal is also sent.
a. data
b. idle signal
c. interrupt
d. acknowledge signal
Q. DDR stands for
a. data direction register
b. data decoding register
c. data decoding rate
d. none of the mentioned