Top 550+ Solved Digital Principles and System Design MCQ Questions Answer
Q. When both inputs of SR latches are high, the latch goes
a. unstable
b. stable
c. metastable
d. bistable
Q. The main difference between a register and a counter is
a. a register has no specific sequence of states
b. a counter has no specific sequence of states
c. a register has capability to store one bit of information but counter has n-bit
d. a register counts data
Q. In serial shifting method, data shifting occurs
a. universal shift register
b. unidirectional shift register
c. unipolar shift register
d. unique shift register
Q. A register that is used to store binary information is called
a. data register
b. binary register
c. shift register
d. d – register
Q. A shift register is defined as
a. the register capable of shifting information to another register
b. the register capable of shifting information either to the right or to the left
c. the register capable of shifting information to the right only
d. the register capable of shifting information to the left only
Q. In digital logic, a counter is a device which
a. counts the number of outputs
b. stores the number of times a particular event or process has occurred
c. stores the number of times a clock pulse rises and falls
d. counts the number of inputs
Q. A counter circuit is usually constructed of
a. a number of latches connected in cascade form
b. a number of nand gates connected in cascade form
c. a number of flip-flops connected in cascade
d. a number of nor gates connected in cascade form
Q. Which of the following attribute is generally used in implementation of sequential circuits?
a. ‘stable
b. ‘length
c. ‘last_event
d. ‘event
Q. Which of the following line is correct for detecting positive edge of a clock?
a. if (clk’event and clk = ‘0’)
b. if (clk’event and clk = ‘1’)
c. if (clk’event or clk = ‘0’)
d. if (clk’event or clk = ‘1’)
Q. The chip by which both the operation of read and write is performed
a. ram
b. rom
c. prom
d. eprom
Q. If a RAM chip has n address input lines then it can access memory locations upto
a. 2(n-1)
b. 2(n+1)
c. 2n
d. 22n