Top 350+ Solved Computer Architecture MCQ Questions Answer

From 76 to 90 of 314

Q. The method followed in case of node failure, wherein the node gets disabled is                     

a. stonith

b. fibre channel

c. fencing

d. none of the mentioned

  • a. stonith

Q. VLIW stands for?

a. very long instruction word

b. very long instruction width

c. very large instruction word

d. very long instruction width

  • a. very long instruction word

Q. The main difference between the VLIW and the other approaches to improve performance is                         

a. cost effectiveness

b. increase in performance

c. lack of complex hardware design

d. all of the mentioned

  • c. lack of complex hardware design

Q. The capacitors lose the charge over time due to                   

a. the leakage resistance of the capacitor

b. the small current in the transistor after being turned on

c. the defect of the capacitor

d. none of the mentioned

  • a. the leakage resistance of the capacitor

Q.                     circuit is used to restore the capacitor value.

a. sense amplify

b. signal amplifier

c. delta modulator

d. none of the mentioned

  • a. sense amplify

Q. To reduce the number of external connections required, we make use of

a. de-multiplexer

b. multiplexer

c. encoder

d. decoder

  • b. multiplexer

Q. The processor must take into account the delay in accessing the memory location, such memories are called

a. delay integrated

b. asynchronous memories

c. synchronous memories

d. isochronous memories

  • b. asynchronous memories

Q. In order to read multiple bytes of a row at the same time, we make use of

a. latch

b. shift register

c. cache

d. memory extension

  • a. latch

Q. The block transfer capability of the DRAM is called                   

a. burst mode

b. block mode

c. fast page mode

d. fast frame mode

  • c. fast page mode

Q. The difference between DRAM’s and SDRAM’s is/are                   

a. the dram’s will not use the master slave relationship in data transfer

b. the sdram’s make use of clock

c. the sdram’s are more power efficient

d. none of the mentioned

  • d. none of the mentioned

Q. The difference in the address and data connection between DRAM’s and SDRAM’s is                 

a. the usage of more number of pins in sdram’s

b. the requirement of more address lines in sdram’s

c. the usage of a buffer in sdram’s

d. none of the mentioned

  • c. the usage of a buffer in sdram’s

Q. A                 is used to restore the contents of the cells.

a. sense amplifier

b. refresh counter

c. restorer

d. none of the mentioned

  • b. refresh counter

Q. The mode register is used to                 

a. select the row or column data transfer mode

b. select the mode of operation

c. select mode of storing the data

d. all of the mentioned

  • b. select the mode of operation

Q.               are used to overcome the difference in data transfer speeds of various devices.

a. speed enhancing circuitory

b. bridge circuits

c. multiple buses

d. buffer registers

  • d. buffer registers
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