Top 550+ Solved Digital Principles and System Design MCQ Questions Answer

From 466 to 480 of 504

Q. The outputs of SR latch are                        

a. x and y

b. a and b

c. s and r

d. q and q’

  • d. q and q’

Q. The NAND latch works when both inputs are

a. 1

b. 0

c. inverted

d. don’t cares

Q. The first step of analysis procedure of SR latch is to                        

a. label inputs

b. label outputs

c. label states

d. label tables

  • b. label outputs

Q. The inputs of SR latch are                        

a. x and y

b. a and b

c. s and r

d. j and k

  • c. s and r

Q. When a high is applied to the Set line of an SR latch, then                        

a. q output goes high

b. q’ output goes high

c. q output goes low

d. both q and q’ go high

  • a. q output goes high

Q. When both inputs of SR latches are low, the latch

a. q output goes high

b. q’ output goes high

c. it remains in its previously set or reset state

d. it goes to its next set or reset state

  • c. it remains in its previously set or reset state

Q. The register is a type of                        

a. sequential circuit

b. combinational circuit

c. cpu

d. latches

  • a. sequential circuit

Q. How many types of registers are?

a. 2

b. 3

c. 4

d. 5

Q. The main difference between a register and a counter is                        

a. a register has no specific sequence of states

b. a counter has no specific sequence of states

c. a register has capability to store one bit of information but counter has n-bit

d. a register counts data

  • a. a register has no specific sequence of states

Q. In serial shifting method, data shifting occurs

a. universal shift register

b. unidirectional shift register

c. unipolar shift register

d. unique shift register

  • b. unidirectional shift register

Q. A register that is used to store binary information is called                        

a. data register

b. binary register

c. shift register

d. d – register

  • b. binary register

Q. A shift register is defined as                        

a. the register capable of shifting information to another register

b. the register capable of shifting information either to the right or to the left

c. the register capable of shifting information to the right only

d. the register capable of shifting information to the left only

  • b. the register capable of shifting information either to the right or to the left

Q. In digital logic, a counter is a device which

a. counts the number of outputs

b. stores the number of times a particular event or process has occurred

c. stores the number of times a clock pulse rises and falls

d. counts the number of inputs

  • b. stores the number of times a particular event or process has occurred

Q. A counter circuit is usually constructed of

a. a number of latches connected in cascade form

b. a number of nand gates connected in cascade form

c. a number of flip-flops connected in cascade

d. a number of nor gates connected in cascade form

  • c. a number of flip-flops connected in cascade
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