Top 350+ Solved Digital Electronics and Logic Design MCQ Questions Answer

From 76 to 90 of 469

Q. In order to implement a n variable switching function, a MUX must have

a. 2n inputs

b. 2n+1 inputs

c. 2n-1 inputs

d. 2n-1inputs

  • a. 2n inputs

Q. A latch is constructed using two cross-coupled

a. and and or gates

b. and gates

c. nand and nor gates

d. nandgates

  • d. nandgates

Q. A combinational logic circuit which sends data coming from a single source to two or more separate destinations is

a. decoder

b. encoder

c. multiplexer

d. demultiple xer

  • d. demultiple xer

Q. Data can be changed from special code to temporal code by using

a. shift registers

b. counters

c. combination al circuits

d. a/d converters

  • a. shift registers

Q. Odd parity of word can beconveniently tested by

a. or gate

b. and gate

c. nor gate

d. xor gate

  • d. xor gate

Q. Which one of the following will give the sum of full adders as output ?

a. three point majority circuit

b. three bit parity checker

c. three bit comparator

d. three bit counter

  • d. three bit counter

Q. The number of full and half-adders required to add 16-bit numbers is

a. 8 half-adders,8 full-adders

b. 1 half-adder,15 full- adders

c. 16 half-adders, 0 full- adders

d. 4 half-adders, 12 full-adders

  • b. 1 half-adder,15 full- adders

Q. A demultiplexer is used to

a. route the data from single input to one of many outputs

b. select data from several inputs and route it to single output

c. perform serial to parallel conversion

d. all of these

  • a. route the data from single input to one of many outputs

Q. Parallel adders are

a. combinational logic circuits

b. sequential logic circuits

c. both (a) and (b)

d. none of these

  • b. sequential logic circuits
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