Top 350+ Solved Digital Electronics and Logic Design MCQ Questions Answer
Q. If the region beneath the gate is left initially uncharged the gate field must induce achannel before current can flow. Thus the gate voltage enhances thechannel current and sucha device is said to operate in the
a. depletion mode operation mos
b. enhancemen t mode operation ofmos
c. both mode
d. none of this
Q. The n- channel MOS conducts when its
a. gate- to- source voltage
b. gate- to- source
c. gate- to- source
d. none of this
Q. The fan-out of a MOS-logic gate is higher than that of TTL gates because of its
a. low input impedance
b. high input impedance
c. low output impedance
d. high output impedance
Q. Which factor does not affect CMOS loading?
a. charging time associated
b. discharging time
c. output capacitance
d. input capacitanc
Q. Logic gates are the basic elements that make a
a. analog system
b. basic system
c. gating system
d. digital system
Q. Which of the following gate is a two-level logic gate
a. or gate
b. nand gate
c. exclusiveor gate
d. not
Q. Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bit
a. ttlas
b. cmos
c. ecl
d. ttlls
Q. CMOS circuits are extensively used for ON-chip computers mainly because of their extremely
a. low power dissipation.
b. high noise immunity.
c. large packing density.
d. low cost.
Q. Which equation is correct?
a. vnl =vil(max) + vol(max)
b. vnh =voh(min) + vih(min)
c. vnl =voh(min) – vih(min)
d. vnh =voh(min)–vih(min)
Q. The greater the propagation delay, the
a. lower the maximum frequency
b. higher the maximum frequency
c. maximum frequency is unaffected
d. minimum frequency is unaffected
Q. In a TTL circuit, if an excessive number of load gate inputs are connected,
a. voh(min) drops below voh
b. voh drops below voh(min)
c. voh exceeds voh(min)
d. voh and voh(min) are unaffected