Top 350+ Solved Digital Electronics and Logic Design MCQ Questions Answer
Q. When a large number of analog signals are to be converted an analog multiplexer is used. In this case most suitable A.D. converter will be
a. ripple carry counter type
b. dual stop type
c. forward counter type
d. successive approxima tion type
Q. The astable multivibrator has
a. two quasi stable states
b. two stable states
c. one stable and one quasi-stable state
d. none of these
Q. The functional difference between S-R flip-flop and J-K flip-flop is that J- K flip-flop
a. is faster than s- r flip-flop
b. has a feed- back path
c. accepts both inputs 1
d. both (a) and (b)
Q. In a positive edge triggered JK flip-flop, a low J and low K produces
a. no change
b. low state
c. high state
d. none of thes
Q. When an inverter is placed between both inputs of an SR flip-flop, then resulting flip-lop is
a. jk flip-flop
b. d flip-flop
c. sr flip-flop
d. master slave jk flip-flop
Q. The master slave JK lip-flop is effectively a combination of
a. a sr flip-flop and a t flip- flop
b. an sr flip- lfop and a d flip-flop
c. a t flip-flop and a d flip- flop
d. two d flip- flops
Q. It is difficult to design asynhronous sequential circuit because
a. external clock is to be provided
b. it is more complex
c. both (a) and (b)
d. generally they involve stability problem
Q. A stable multivibrator is used as
a. comparator circuit
b. demultiplexe r
c. frequency to voltage converter
d. voltage to frequency converter
Q. 41: In a ripple counter using edge triggered JK flfp-flops, the pulse input is applied to the
a. clock input of all flip-flops
b. clock input of one flip- flops
c. j and k inputs of all flip-flops
d. j and k inputs of one flip- flop
Q. The main difference between JK and RS flip-flop is that
a. jk flip flop needs a clock pulse
b. there is a feedback in jk lip-lop
c. jk flip-flop accepts both inputs as 1
d. jk flip-flop is acronym of junction cathodemultivibra tor