Top 150+ Solved Computer Organization and Architecture MCQ Questions Answer
Q. In signed-magnitude binary division, if the dividend is (11100)2 and divisor is(10011)2 then the result is ______.
a. (00100)2
b. (10100)2
c. (11001)2
d. (01100)2
Q. Generally Dynamic RAM is used as main memory in a computer system asit______.
a. Consumes less power
b. has higher speed
c. has lower cell density
d. needs refreshing circuitry
Q. Write Through technique is used in which memory for updating the data_____.
a. Virtual memory
b. Main memory
c. Auxiliary memory
d. Cache memory
Q. Cache memory acts between_______.
a. CPU and RAM
b. RAM and ROM
c. CPU and Hard Disk
d. None of these
Q. The circuit used to store one bit of data is known as ______.
a. Encoder
b. OR gate
c. Flip Flop
d. Decoder
Q. . In a memory-mapped I/O system, which of the following will not be there?
a. LDA
b. IN
c. ADD
d. OUT
Q. The addressing mode used in an instruction of the form ADD X Y, is _____.
a. Absolute
b. indirect
c. index
d. none of these
Q. _________ register keeps track of the instructions stored in program storedin memory.
a. AR (Address Register)
b. XR (Index Register)
c. PC (Program Counter)
d. AC (Accumulator)
Q. The idea of cache memory is based ______.
a. on the property of locality of reference
b. on the heuristic 90-10 rule
c. on the fact that references generally tend to cluster
d. all of the above
Q. The average time required to reach a storage location in memory and obtainits contents is called the _____.
a. seek time
b. turnaround time
c. access time
d. transfer time
Q. (2FAOC)16 is equivalent to _____.
a. (195 084)10
b. (001011111010 0000 1100)2
c. Both A.and (B)
d. None of these
Q. The circuit used to store one bit of data is known as_______.
a. Register
b. Encoder
c. Decoder
d. Flip Flop
Q. . Computers use addressing mode techniques for ____________.
a. giving programming versatility to the user by providing facilities as pointers to memory counters for loop control
b. to reduce no. of bits in the field of instruction
c. specifying rules for modifying or interpreting address field of the instruction
d. All the above