Top 250+ Solved Electronic Devices and Circuits MCQ Questions Answer
Q. The major advantage of TTL logic circuits over CMOS is
a. lower propagation delay.
b. the ability to output higher voltages.
c. more modern design.
d. very low power consumption
Q. The maximum current for a HIGH output on a standard TTL gate is
a. -10 µ
b. -400 µa.
c. -1 µa.
d. -10 ma.
Q. The maximum current for a LOW output on a standard TTL gate is
a. 16 µ
b. 40 ma.
c. 100 µa.
d. 16 ma.
Q. The major advantage of CMOS logic circuits over TTL is
a. very low power consumption.
b. the ability to produce several output voltage levels.
c. lower propagation delay.
d. much higher propagation delay.
Q. The abbreviated designation for input current with a LOW input is
a. vih.
b. iih.
c. iil.
d. iol.
Q. In order to interface an FPGA with an external device, you must set the value of the
a. sink current.
b. external power supply.
c. source current.
d. all of the above
Q. The lower transistor of a totem-pole output is saturated when the gate output is
a. high.
b. low.
c. malfunctioning.
d. over driven.
Q. The standard 74XX TTL IC family was originally developed in the
a. 1970s.
b. 1960s.
c. 1950s.
d. 1940s.
Q. The minimum output voltage recognized as a HIGH by a TTL gate is
a. 0.8 v.
b. 2.4 v.
c. 5.0 v.
d. 2.0 v.
Q. An open-collector TTL gate
a. can sink current but cannot source current.
b. can source current but cannot sink current.
c. cannot source or sink current.
d. can sink more current than a standard ttl gate.
Q. The minimum input voltage recognized as a HIGH by a TTL gate is
a. 0.8 v.
b. 2.4 v.
c. 2.0 v.
d. 5.0 v
Q. Which of the following digital IC logic families is most susceptible to static discharge?
a. rtl
b. ecl
c. mos
d. ttl