Q. The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains (Solved)
1. 01110
2. 00001
3. 00101
4. 00110
- c. 00101
1. 01110
2. 00001
3. 00101
4. 00110